In this paper we investigate the fault diagnosis problem in IP networks. We provide a lower bound on the average number of probes per edge using variational inference technique pro...
Rajesh Narasimha, Souvik Dihidar, Chuanyi Ji, Stev...
Loical defect diagnosis is a critical yet challenging process in VLSI manufacturing. It involves the identification of the defect spots in a logic IC that fails testing. In the la...
One of the emerging challenges in formal property verification (FPV) technology is the problem of deciding whether sufficient properties have been written to cover the design in...
Database application programs typically contain program units that use SQL statements to manipulate records in database instances. Testing the correctness of data manipulation by ...
This paper presents a revised model for the yield analysis of FPGA interconnect layers. Based on proven yield models, this work improves the predictions and assumptions of previous...
Nicola Campregher, Peter Y. K. Cheung, George A. C...