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» On Modeling Cross-Talk Faults
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ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 5 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
ESEC
1991
Springer
14 years 8 days ago
A Dynamic Failure Model for Predicting the Impact that a Program Location has on the Program
This paper presents a dynamic technique for predicting the e ect that a location" of a program will have on the program's computational behavior. The technique is based ...
Jeffrey M. Voas
WOSP
2010
ACM
14 years 3 months ago
A page fault equation for dynamic heap sizing
For garbage-collected applications, dynamically-allocated objects are contained in a heap. Programmer productivity improves significantly if there is a garbage collector to autom...
Y. C. Tay, X. R. Zong
EH
2005
IEEE
171views Hardware» more  EH 2005»
14 years 2 months ago
Implementation Results for a Fault-Tolerant Multicellular Architecture Inspired by Endocrine Communication
The hybrid redundancy structure found at the cellular level of higher animals provides complex organism with the three key features of a reliability-engineered system: fault toler...
Andrew J. Greensted, Andy M. Tyrrell
DSN
2004
IEEE
14 years 14 days ago
Characterizing the Effects of Transient Faults on a High-Performance Processor Pipeline
The progression of implementation technologies into the sub-100 nanometer lithographies renew the importance of understanding and protecting against single-event upsets in digital...
Nicholas J. Wang, Justin Quek, Todd M. Rafacz, San...