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» On Models for Quantified Boolean Formulas
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CSL
2009
Springer
13 years 11 months ago
Tree-Width for First Order Formulae
We introduce tree-width for first order formulae , fotw(). We show that computing fotw is fixed-parameter tractable with parameter fotw. Moreover, we show that on classes of formul...
Isolde Adler, Mark Weyer
ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
ECCC
2010
79views more  ECCC 2010»
13 years 7 months ago
IP = PSPACE using Error Correcting Codes
The IP theorem, which asserts that IP = PSPACE (Lund et. al., and Shamir, in J. ACM 39(4)), is one of the major achievements of complexity theory. The known proofs of the theorem ...
Or Meir
ICCAD
1994
IEEE
137views Hardware» more  ICCAD 1994»
13 years 11 months ago
Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints
We present in this paper a novel control synthesis technique for system-level specifications that are better described as a set of concurrent synchronous descriptions, their synch...
Claudionor José Nunes Coelho Jr., Giovanni ...
CONCUR
2006
Springer
13 years 9 months ago
Model Checking Quantified Computation Tree Logic
Propositional temporal logic is not suitable for expressing properties on the evolution of dynamically allocated entities over time. In particular, it is not possible to trace such...
Arend Rensink