Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
Thiago S. M. C. de Farias, Mozart W. S. Almeida, J...
Abstract. In this paper, we propose a new approach, parallel iterative improvement (PII), to solving the stable matching problem. This approach treats the stable matching problem a...
In this paper we present an efficient general simulation strategy for computations designed for fully operational BSP machines of n ideal processors, on n-processor dynamic-fault-p...
Spyros C. Kontogiannis, Grammati E. Pantziou, Paul...
Well-defined memory consistency models are necessary for writing correct parallel software. Developing and understanding formal specifications of hardware memory models is a chal...
This paper presents a logic synthesis tool called BETSY (BIST Environment Testable Synthesis) for synthesizing circuits that achieve complete (100%)fault coverage in a user specif...