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» On Optimization of Test Parallelization with Constraints
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SBACPAD
2008
IEEE
206views Hardware» more  SBACPAD 2008»
14 years 3 months ago
A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
Thiago S. M. C. de Farias, Mozart W. S. Almeida, J...
HIPC
2003
Springer
14 years 2 months ago
A Parallel Iterative Improvement Stable Matching Algorithm
Abstract. In this paper, we propose a new approach, parallel iterative improvement (PII), to solving the stable matching problem. This approach treats the stable matching problem a...
Enyue Lu, S. Q. Zheng
MST
2000
101views more  MST 2000»
13 years 8 months ago
Robust Parallel Computations through Randomization
In this paper we present an efficient general simulation strategy for computations designed for fully operational BSP machines of n ideal processors, on n-processor dynamic-fault-p...
Spyros C. Kontogiannis, Grammati E. Pantziou, Paul...
CAV
2010
Springer
179views Hardware» more  CAV 2010»
14 years 27 days ago
Generating Litmus Tests for Contrasting Memory Consistency Models
Well-defined memory consistency models are necessary for writing correct parallel software. Developing and understanding formal specifications of hardware memory models is a chal...
Sela Mador-Haim, Rajeev Alur, Milo M. K. Martin
ITC
1998
IEEE
114views Hardware» more  ITC 1998»
14 years 1 months ago
BETSY: synthesizing circuits for a specified BIST environment
This paper presents a logic synthesis tool called BETSY (BIST Environment Testable Synthesis) for synthesizing circuits that achieve complete (100%)fault coverage in a user specif...
Zhe Zhao, Bahram Pouya, Nur A. Touba