Sciweavers

2452 search results - page 325 / 491
» On Reduction of Lagrange Systems
Sort
View
DAC
2006
ACM
15 years 10 months ago
Buffer memory optimization for video codec application modeled in Simulink
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
Sang-Il Han, Xavier Guerin, Soo-Ik Chae, Ahmed Ami...
SAC
2006
ACM
15 years 10 months ago
Hardware/software 2D-3D backprojection on a SoPC platform
The reduction of image reconstruction time is needed to spread the use of PET for research and routine clinical practice. In this purpose, this article presents a hardware/softwar...
Nicolas Gac, Stéphane Mancini, Michel Desvi...
CLUSTER
2005
IEEE
15 years 10 months ago
A Feasibility Analysis of Power Awareness in Commodity-Based High-Performance Clusters
We present a feasibility study of a power-reduction scheme that reduces the thermal power of processors by lowering frequency and voltage in the context of high-performance comput...
Chung-Hsing Hsu, Wu-chun Feng
HICSS
2005
IEEE
157views Biometrics» more  HICSS 2005»
15 years 10 months ago
Integration Technology Adoption in Healthcare Organisations: A Case for Enterprise Application Integration
A continuous technological innovation in software has brought development in integration technologies that promise the real time enterprise-wide systems integration. Healthcare or...
Khalil Khoumbati, Marinos Themistocleous, Zahir Ir...
ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
15 years 10 months ago
HIBI-based multiprocessor SoC on FPGA
Abstract — FPGAs offer excellent platform for System-onChips consisting of Intellectual Property (IP) blocks. The problem is that IP blocks and their interconnections are often F...
Erno Salminen, Ari Kulmala, Timo D. Hämä...