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» On Structural vs. Functional Testing for Delay Faults
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ICCAD
1995
IEEE
94views Hardware» more  ICCAD 1995»
13 years 11 months ago
Test register insertion with minimum hardware cost
Implementing a built-in self-test by a "test per clock" scheme offers advantages concerning fault coverage, detection of delay faults, and test application time. Such a ...
Albrecht P. Stroele, Hans-Joachim Wunderlich
EICS
2010
ACM
13 years 5 months ago
An automated routine for menu structure optimization
We propose an automated routine for hierarchical menu structure optimization. A computer advice-giving system founded on the mathematical model of menu navigation directs the desi...
Mikhail V. Goubko, Alexander I. Danilenko
ICCAD
2008
IEEE
98views Hardware» more  ICCAD 2008»
14 years 4 months ago
Statistical path selection for at-speed test
Abstract— Process variations make at-speed testing significantly more difficult. They cause subtle delay changes that are distributed rather than the localized nature of a trad...
Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chan...
ICCAD
2008
IEEE
130views Hardware» more  ICCAD 2008»
14 years 4 months ago
Lightweight secure PUFs
— To ensure security and robustness of the next generation of Physically Unclonable Functions (PUFs), we have developed a new methodology for PUF design. Our approach employs int...
Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potk...
LREC
2008
111views Education» more  LREC 2008»
13 years 9 months ago
Sensitivity of Automated MT Evaluation Metrics on Higher Quality MT Output: BLEU vs Task-Based Evaluation Methods
We report the results of an experiment to assess the ability of automated MT evaluation metrics to remain sensitive to variations in MT quality as the average quality of the compa...
Bogdan Babych, Anthony Hartley