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» On Timing Analysis of Combinational Circuits
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ICCAD
2008
IEEE
130views Hardware» more  ICCAD 2008»
14 years 5 months ago
Lightweight secure PUFs
— To ensure security and robustness of the next generation of Physically Unclonable Functions (PUFs), we have developed a new methodology for PUF design. Our approach employs int...
Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potk...
DSN
2009
IEEE
14 years 3 months ago
On the effectiveness of low latency anonymous network in the presence of timing attack
In this paper, we introduce a novel metric that can quantitatively measure the practical effectiveness (i.e. anonymity) of all anonymous networks in the presence of timing attack....
Jing Jin, Xinyuan Wang
GLVLSI
2008
IEEE
128views VLSI» more  GLVLSI 2008»
14 years 2 months ago
NBTI-aware flip-flop characterization and design
With the scaling down of the CMOS technologies, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging process and the ...
Hamed Abrishami, Safar Hatami, Behnam Amelifard, M...
ISCAS
2003
IEEE
131views Hardware» more  ISCAS 2003»
14 years 1 months ago
Process variation dimension reduction based on SVD
We propose an algorithm based on singular value decomposition (SVD) to reduce the number of process variation variables. With few process variation variables, fault simulation and...
Zhuo Li, Xiang Lu, Weiping Shi
CGF
2010
189views more  CGF 2010»
13 years 8 months ago
Space-in-Time and Time-in-Space Self-Organizing Maps for Exploring Spatiotemporal Patterns
Spatiotemporal data pose serious challenges to analysts in geographic and other domains. Owing to the complexity of the geospatial and temporal components, this kind of data canno...
Gennady L. Andrienko, Natalia V. Andrienko, Sebast...