Sciweavers

1529 search results - page 122 / 306
» On Timing Analysis of Combinational Circuits
Sort
View
GLVLSI
2010
IEEE
190views VLSI» more  GLVLSI 2010»
13 years 10 months ago
A linear statistical analysis for full-chip leakage power with spatial correlation
In this paper, we present an approved linear-time algorithm for statistical leakage analysis in the present of any spatial correlation condition (strong or weak). The new algorith...
Ruijing Shen, Sheldon X.-D. Tan, Jinjun Xiong
ICCAD
2005
IEEE
125views Hardware» more  ICCAD 2005»
14 years 5 months ago
Robust mixed-size placement under tight white-space constraints
A novel and very simple correct-by-construction top-down methodology for high-utilization mixed-size placement is presented. The PolarBear algorithm combines recursive cutsize-dri...
Jason Cong, Michail Romesis, Joseph R. Shinnerl
ISPD
2006
ACM
175views Hardware» more  ISPD 2006»
14 years 2 months ago
mPL6: enhanced multilevel mixed-size placement
The multilevel placement package mPL6 combines improved implementations of the global placer mPL5 (ISPD05) and the XDP legalizer and detailed placer (ASPDAC06). It consistently pr...
Tony F. Chan, Jason Cong, Joseph R. Shinnerl, Kent...
JCNS
2010
81views more  JCNS 2010»
13 years 6 months ago
Sensory information in local field potentials and spikes from visual and auditory cortices: time scales and frequency bands
Studies analyzing sensory cortical processing or trying to decode brain activity often rely on a combination of different electrophysiological signals, such as local field potentia...
Andrei Belitski, Stefano Panzeri, Cesare Magri, Ni...
ICFP
2012
ACM
11 years 10 months ago
Introspective pushdown analysis of higher-order programs
In the static analysis of functional programs, pushdown flow analabstract garbage collection skirt just inside the boundaries of soundness and decidability. Alone, each method re...
Christopher Earl, Ilya Sergey, Matthew Might, Davi...