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» On Timing Analysis of Combinational Circuits
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DAC
2000
ACM
14 years 9 months ago
Power minimization using control generated clocks
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
M. Srikanth Rao, S. K. Nandy
ISQED
2008
IEEE
103views Hardware» more  ISQED 2008»
14 years 2 months ago
Modeling of NBTI-Induced PMOS Degradation under Arbitrary Dynamic Temperature Variation
Negative bias temperature instability (NBTI) is one of the primary limiters of reliability lifetime in nano-scale integrated circuits. NBTI manifests itself in a gradual increase ...
Bin Zhang, Michael Orshansky
AMAST
2008
Springer
13 years 10 months ago
Generating Specialized Rules and Programs for Demand-Driven Analysis
Many complex analysis problems can be most clearly and easily specified as logic rules and queries, where rules specify how given facts can be combined to infer new facts, and quer...
K. Tuncay Tekle, Katia Hristova, Yanhong A. Liu
ICSE
2010
IEEE-ACM
14 years 1 months ago
An eclectic approach for change impact analysis
Change impact analysis aims at identifying software artifacts being affected by a change. In the past, this problem has been addressed by approaches relying on static, dynamic, a...
Michele Ceccarelli, Luigi Cerulo, Gerardo Canfora,...
DISOPT
2007
155views more  DISOPT 2007»
13 years 8 months ago
Linear-programming design and analysis of fast algorithms for Max 2-CSP
The class Max (r, 2)-CSP (or simply Max 2-CSP) consists of constraint satisfaction problems with at most two r-valued variables per clause. For instances with n variables and m bin...
Alexander D. Scott, Gregory B. Sorkin