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EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
13 years 11 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng
ICS
2000
Tsinghua U.
13 years 11 months ago
Using complete system simulation to characterize SPECjvm98 benchmarks
Complete system simulation to understand the influence of architecture and operating systems on application execution has been identified to be crucial for systems design. While t...
Tao Li, Lizy Kurian John, Narayanan Vijaykrishnan,...
ICALP
2010
Springer
13 years 9 months ago
From Secrecy to Soundness: Efficient Verification via Secure Computation
d Abstract) Benny Applebaum1 , Yuval Ishai2 , and Eyal Kushilevitz3 1 Computer Science Department, Weizmann Institute of Science 2 Computer Science Department, Technion and UCLA 3 ...
Benny Applebaum, Yuval Ishai, Eyal Kushilevitz
AWPN
2008
311views Algorithms» more  AWPN 2008»
13 years 9 months ago
WoPeD 2.0 goes BPEL 2.0
WoPeD (Workflow Petrinet Designer) is an easy-to-use, Java-based open source software tool being developed at the University of Cooperative Education, Karlsruhe. WoPeD is able to e...
Andreas Eckleder, Thomas Freytag
NIPS
1998
13 years 9 months ago
Divisive Normalization, Line Attractor Networks and Ideal Observers
Gain control by divisive inhibition, a.k.a. divisive normalization, has been proposed to be a general mechanism throughout the visual cortex. We explore in this study the statisti...
Sophie Deneve, Alexandre Pouget, Peter E. Latham