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ICCAD
1997
IEEE
99views Hardware» more  ICCAD 1997»
14 years 1 months ago
High-level area and power estimation for VLSI circuits
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
Mahadevamurty Nemani, Farid N. Najm
CEC
2008
IEEE
14 years 3 months ago
Multi-level neutrality in optimization
Abstract— This paper explores the idea of neutrality in heuristic optimization algorithms. In particular, the effect of having multiple levels of neutrality in representations is...
Colin G. Johnson
ISVLSI
2007
IEEE
107views VLSI» more  ISVLSI 2007»
14 years 3 months ago
A Quantum Algorithm for Finding Minimum Exclusive-Or Expressions
This paper presents a quantum algorithm for finding minimal ESCT (Exclusive-or Sum of Complex Terms) or ESOP (Exclusiveor Sum Of Products) expressions for any arbitrary incomplet...
Marinos Sampson, Dimitrios Voudouris, George K. Pa...
TBILLC
2005
Springer
14 years 2 months ago
Natural Logic for Natural Language
We implement the extension of the logical consequence relation to a partial order ≤ on arbitary types built from e (entities) and t (Booleans) that was given in [1], and the de...
Jan van Eijck
DATE
2000
IEEE
108views Hardware» more  DATE 2000»
14 years 1 months ago
Automatic Abstraction for Worst-Case Analysis of Discrete Systems
c Abstraction for Worst-Case Analysis of Discrete Systems Felice Balarin Cadence Berkeley Laboratories Recently, a methodology for worst-case analysis of discrete systems has been...
Felice Balarin