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» On diagnosability of large multiprocessor networks
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ISCAS
2008
IEEE
110views Hardware» more  ISCAS 2008»
14 years 2 months ago
Photonic networks-on-chip: Opportunities and challenges
Abstract— As the number of processing cores that are integrated into a chip multiprocessors (CMP) continues to grow, the network-on-chip paradigm has emerged as a promising solut...
Michele Petracca, Keren Bergman, Luca P. Carloni
IPPS
2000
IEEE
14 years 7 days ago
Using Time Skewing to Eliminate Idle Time due to Memory Bandwidth and Network Limitations
Time skewing is a compile-time optimization that can provide arbitrarily high cache hit rates for a class of iterative calculations, given a sufficient number of time steps and s...
David Wonnacott
MOBISYS
2006
ACM
14 years 7 months ago
MOJO: a distributed physical layer anomaly detection system for 802.11 WLANs
Deployments of wireless LANs consisting of hundreds of 802.11 access points with a large number of users have been reported in enterprises as well as college campuses. However, du...
Anmol Sheth, Christian Doerr, Dirk Grunwald, Richa...
HPDC
1998
IEEE
14 years 3 days ago
The NetLogger Methodology for High Performance Distributed Systems Performance Analysis
We describe a methodology that enables the real-time diagnosis of performance problems in complex high-performance distributed systems. The methodology includes tools for generati...
Brian Tierney, William E. Johnston, Brian Crowley,...
DAC
2007
ACM
14 years 8 months ago
The Case for Low-Power Photonic Networks on Chip
Packet-switched networks on chip (NoC) have been advocated as a natural communication mechanism among the processing cores in future chip multiprocessors (CMP). However, electroni...
Assaf Shacham, Keren Bergman, Luca P. Carloni