107 search results - page 18 / 22 » On diagnosability of large multiprocessor networks |
DATE
2006
IEEE
14 years 3 months ago
2006
IEEE
Memory and communication architectures have a significant impact on the cost, performance, and time-to-market of complex multi-processor system-on-chip (MPSoC) designs. The memory...
SPAA
2000
ACM
14 years 18 days ago
2000
ACM
Modern VLSI processing supports a two-dimensional surface for active devices along with multiple stacked layers of interconnect. With the advent of planarization, the number of la...
DSN
2005
IEEE
14 years 2 months ago
2005
IEEE
Continuous-time Markov chains (CTMCs) have been used successfully to model the dependability and performability of many systems. Matrix diagrams (MDs) are known to be a space-efï¬...
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
INFOCOM
2010
IEEE
13 years 7 months ago
2010
IEEE
Misconfigured P2P traffic caused by bugs in volunteer-developed P2P software or by attackers is prevalent. It influences both end users and ISPs. In this paper, we discover and stu...