Sciweavers

180 search results - page 19 / 36
» On digit-recurrence division implementations for field progr...
Sort
View
FPL
2005
Springer
149views Hardware» more  FPL 2005»
14 years 1 months ago
Heterogeneity Exploration for Multiple 2D Filter Designs
Many image processing applications require fast convolution of an image with a set of large 2D filters. Field - Programmable Gate Arrays (FPGAs) are often used to achieve this go...
Christos-Savvas Bouganis, Peter Y. K. Cheung, Geor...
CHES
2004
Springer
106views Cryptology» more  CHES 2004»
13 years 11 months ago
XTR Implementation on Reconfigurable Hardware
Abstract. Recently, Lenstra and Verheul proposed an efficient cryptosystem called XTR. This system represents elements of F p6 with order dividing p2 -p+1 by their trace over Fp2 ....
Eric Peeters, Michael Neve, Mathieu Ciet
FPGA
2000
ACM
175views FPGA» more  FPGA 2000»
13 years 11 months ago
An FPGA implementation and performance evaluation of the Serpent block cipher
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
Adam J. Elbirt, Christof Paar
RECONFIG
2009
IEEE
118views VLSI» more  RECONFIG 2009»
14 years 2 months ago
Protecting the NOEKEON Cipher against SCARE Attacks in FPGAs by Using Dynamic Implementations
Abstract. Protecting an implementation against Side Channel Analysis for Reverse Engineering (SCARE) attacks is a great challenge and we address this challenge by presenting a fir...
Julien Bringer, Hervé Chabanne, Jean-Luc Da...
EVOW
2003
Springer
14 years 29 days ago
GAME-HDL: Implementation of Evolutionary Algorithms Using Hardware Description Languages
Evolutionary Algorithms (EAs) have been proposed as a very powerful heuristic optimization technique to solve complex problems. Many case studies have shown that they work very eff...
Rolf Drechsler, Nicole Drechsler