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ICIP
2006
IEEE
14 years 9 months ago
An FPGA-Based Implementation of Spatio-Temporal Object Segmentation
This paper proposes a robust real-time, scalable and modular Field Programmable Gate Array (FPGA) based implementation of a spatiotemporal segmentation of video objects. The goal ...
Kumara Ratnayake, Aishy Amer
FPL
2008
Springer
117views Hardware» more  FPL 2008»
13 years 9 months ago
A versatile hardware architecture for a CFAR detector based on a linear insertion sorter
This paper presents a versatile hardware architecture that implements six variant of the CFAR detector based on linear and non-linear operations. Since some implemented CFAR detec...
Roberto Perez-Andrade, René Cumplido, Claud...
IPPS
1998
IEEE
13 years 12 months ago
Implementing Parallelism in Random Discrete Event-Driven Simulation
Abstract. The inherently sequential nature of random discrete eventdriven simulation has made parallel and distributed processing di cult. This paper presents a method of applying ...
Marc Bumble, Lee D. Coraor
SBRN
1998
IEEE
13 years 12 months ago
Implementation of a Probabilistic Neural Network for Multi-spectral Image Classification on an FPGA based Custom Computing Machi
As the demand for higher performance computers for the processing of remote sensing science algorithms increases, the need to investigate new computing paradigms is justified. Fie...
Marco A. Figueiredo, Clay Gloster
ITCC
2005
IEEE
14 years 1 months ago
FPGA Implementations of the ICEBERG Block Cipher
— This paper presents FPGA (Field Programmable Gate Array) implementations of ICEBERG, a block cipher designed for reconfigurable hardware implementations and presented at FSE 2...
François-Xavier Standaert, Gilles Piret, Ga...