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» On efficient balanced codes
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CODES
2006
IEEE
14 years 1 months ago
Increasing hardware efficiency with multifunction loop accelerators
To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
DATE
2008
IEEE
97views Hardware» more  DATE 2008»
13 years 11 months ago
Energy Efficient and High Speed On-Chip Ternary Bus
We propose two crosstalk reducing coding schemes using ternary busses. In addition to low power consumption and reduced delay, our schemes offer other advantages over binary codin...
Chunjie Duan, Sunil P. Khatri
CONCURRENCY
2006
140views more  CONCURRENCY 2006»
13 years 9 months ago
An efficient memory operations optimization technique for vector loops on Itanium 2 processors
To keep up with a large degree of instruction level parallelism (ILP), the Itanium 2 cache systems use a complex organization scheme: load/store queues, banking and interleaving. ...
William Jalby, Christophe Lemuet, Sid Ahmed Ali To...
ICC
2007
IEEE
128views Communications» more  ICC 2007»
14 years 4 months ago
An Efficient Selective Receiver for STBC Scheme
—In this paper, we propose an efficient selective receiver for space-time block coding (STBC) scheme. In this proposed scheme, we divide the received signals into two groups. By ...
Lijun Liu, Sooyoung Kim, Myoung-Seob Lim
PVLDB
2010
122views more  PVLDB 2010»
13 years 4 months ago
ZINC: Efficient Indexing for Skyline Computation
We present a new indexing method named ZINC (for Z-order Indexing with Nested Code) that supports efficient skyline computation for data with both totally and partially ordered at...
Bin Liu, Chee-Yong Chan