305 search results - page 12 / 61 » On modeling top-down VLSI design |
SPAA
2000
ACM
13 years 11 months ago
2000
ACM
Modern VLSI processing supports a two-dimensional surface for active devices along with multiple stacked layers of interconnect. With the advent of planarization, the number of la...
DFT
1998
IEEE
13 years 12 months ago
1998
IEEE
This paper presents a system to evaluate the testability of an on-line testable circuit. The system operates at the RT-level, before the logic synthesis step, and allows for an ex...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper approaches statistical optimization by examining gate delay variation models and optimization objectives. Most previous work on statistical optimization has focused exc...
ICCD
1997
IEEE
13 years 11 months ago
1997
IEEE
Asynchronous design has a potential of solving many difficulties, such as clock skew and power consumption, which synchronous counterpart suffers with current and future VLSI tech...
NIPS
1990
13 years 8 months ago
1990
Inspired by a visual motion detection model for the rabbit retina and by a computational architecture used for early audition in the barn owl, we have designed a chip that employs...