305 search results - page 43 / 61 » On modeling top-down VLSI design |
DAC
2003
ACM
14 years 22 days ago
2003
ACM
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
GECCO
2005
Springer
14 years 1 months ago
2005
Springer
Distributed Genetic Algorithms (DGAs) designed for the Internet have to take its high communication cost into consideration. For island model GAs, the migration topology has a maj...
KES
1998
Springer
13 years 11 months ago
1998
Springer
The architectural and circuit design aspects of a mixed analog/digital very large scale integration (VLSI) motion detection chip based on models of the insect visual system are des...
GLVLSI
2002
IEEE
14 years 13 days ago
2002
IEEE
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...