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DATE
2002
IEEE
206views Hardware» more  DATE 2002»
14 years 2 months ago
Accurate Area and Delay Estimators for FPGAs
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
Anshuman Nayak, Malay Haldar, Alok N. Choudhary, P...
ICCD
2005
IEEE
165views Hardware» more  ICCD 2005»
14 years 6 months ago
Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...
Ernst Martin Witte, Anupam Chattopadhyay, Oliver S...
ISCAS
2005
IEEE
107views Hardware» more  ISCAS 2005»
14 years 2 months ago
Parameter domain pruning for improving convergence of synthesis algorithms
— This paper presents a parameter domain pruning method. Parameter domain pruning aims to identify parameter sub-domains that are more likely to produce feasible and good design ...
Hua Tang, Alex Doboli
CAV
2006
Springer
128views Hardware» more  CAV 2006»
14 years 25 days ago
Safraless Compositional Synthesis
In automated synthesis, we transform a specification into a system that is guaranteed to satisfy the specification. In spite of the rich theory developed for system synthesis, litt...
Orna Kupferman, Nir Piterman, Moshe Y. Vardi
SIES
2007
IEEE
14 years 3 months ago
Design Space Exploration with Evolutionary Multi-Objective Optimisation
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
Martin Holzer 0002, Bastian Knerr, Markus Rupp