315 search results - page 15 / 63 » On reducing load store latencies of cache accesses |
MICRO
2003
IEEE
14 years 26 days ago
2003
IEEE
High-performance caches statically pull up the bitlines in all cache subarrays to optimize cache access latency. Unfortunately, such an architecture results in a significant wast...
HPCA
1998
IEEE
13 years 12 months ago
1998
IEEE
The explosive growth in the performance of microprocessors and networks has created a new opportunity to reduce the latency of fine-grain communication. Microprocessor clock speed...
ADBIS
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. Caching data reduces user-perceived latency and often enhances availability in case of server crashes or network failures. DB caching aims at local processing of declarat...
MICRO
1997
IEEE
13 years 11 months ago
1997
IEEE
As processors continue to exploit more instruction level parallelism, a greater demand is placed on reducing the e ects of memory access latency. In this paper, we introduce a nov...
GCC
2005
Springer
14 years 1 months ago
2005
Springer
Web caching has been well accepted as a viable method for saving network bandwidth and reducing user access latency. To provide cache sharing on a large scale, hierarchical web cac...