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» On reducing load store latencies of cache accesses
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HPCA
2009
IEEE
14 years 8 months ago
PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches
As the last-level on-chip caches in chip-multiprocessors increase in size, the physical locality of on-chip data becomes important for delivering high performance. The non-uniform...
Mainak Chaudhuri
ICPP
2003
IEEE
14 years 27 days ago
A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches
Aggressive hardware-based and software-based prefetch algorithms for hiding memory access latencies were proposed to bridge the gap of the expanding speed disparity between proces...
Xiaotong Zhuang, Hsien-Hsin S. Lee
SPIRE
2005
Springer
14 years 1 months ago
Cache-Conscious Collision Resolution in String Hash Tables
In-memory hash tables provide fast access to large numbers of strings, with less space overhead than sorted structures such as tries and binary trees. If chains are used for collis...
Nikolas Askitis, Justin Zobel
EUROIMSA
2006
299views Multimedia» more  EUROIMSA 2006»
13 years 9 months ago
Behavior Modeling using Bigram Frequencies for Client-Side Link Prefetching
The perceived latency for a user surfing the Internet is the target of a transparent and speculative algorithm that relies on a user behavior model. The model is based on past use...
Apostolos Georgakis, Haibo Li, Mihaela Gordan
INFOCOM
2000
IEEE
14 years 14 hour ago
Parallel-Access for Mirror Sites in the Internet
— Popular documents are frequently mirrored on multiple sites in an effort to share the load and reduce clients’ retrieval latencies. However, choosing the best mirror site is ...
Pablo Rodriguez, Andreas Kirpal, Ernst Biersack