We present an analytical model relating FPGA architectural parameters to the routability of the FPGA. The inputs to the model include the channel width and connection and switch b...
Improving detailed routing routability is an important objective of a global router. In this paper, we propose GDRouter, an interleaved global routing and detailed routing algorit...
This paper presents a new technology mapper, WireMap. The mapper uses an edge flow heuristic to improve the routability of a mapped design. The heuristic is applied during the ite...
Stephen Jang, Billy Chan, Kevin Chung, Alan Mishch...
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
Security is a critical design issue in Mobile IPv6 since adversaries can take advantage of its routing process and arbitrarily channelize the traffic to different destinations. Th...