Abstract. This paper introduces JHDLBits, the integration of two prominent FPGA design tools: JHDL and JBits. JHDLBits offers the low-level access and control provided by JBits wi...
Alexandra Poetter, Jesse Hunter, Cameron Patterson...
- The subject of this paper is a hybrid hip biped climbing robot. The hybrid hip provides both prismatic and revolute motion, discretely, to the robot, using a single actuator. Thi...
One of the challenges in large scale distributed computing is to utilize the thousands of idle personal computers. In this paper, we present a system that enables users to e ortles...
In this paper we propose a technique for visualizing steady flow. Using this technique, we first convert the vector field data into a scalar level-set representation. We then a...
The floating-point unit of a S/390 CMOS microprocessor is described. It contains a 116 bit fraction dataflow for addition and subtraction and a 64 bit-wide multiplier. Besides the...