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FPL
2004
Springer
103views Hardware» more  FPL 2004»
14 years 3 months ago
JHDLBits: The Merging of Two Worlds
Abstract. This paper introduces JHDLBits, the integration of two prominent FPGA design tools: JHDL and JBits. JHDLBits offers the low-level access and control provided by JBits wi...
Alexandra Poetter, Jesse Hunter, Cameron Patterson...
ICRA
2003
IEEE
155views Robotics» more  ICRA 2003»
14 years 2 months ago
A Multifunctional Hybrid Hip Joint for Improved Adaptability in Miniature Climbing Robots
- The subject of this paper is a hybrid hip biped climbing robot. The hybrid hip provides both prismatic and revolute motion, discretely, to the robot, using a single actuator. Thi...
Satya P. Krosuri, Mark A. Minor
IPPS
2000
IEEE
14 years 2 months ago
An Open Market-Based Architecture for Distributed Computing
One of the challenges in large scale distributed computing is to utilize the thousands of idle personal computers. In this paper, we present a system that enables users to e ortles...
Spyros Lalis, Alexandros Karypidis
VISUALIZATION
2000
IEEE
14 years 2 months ago
A level-set method for flow visualization
In this paper we propose a technique for visualizing steady flow. Using this technique, we first convert the vector field data into a scalar level-set representation. We then a...
Rüdiger Westermann, Christopher Johnson, Thom...
ARITH
1999
IEEE
14 years 2 months ago
Floating-Point Unit in Standard Cell Design with 116 Bit Wide Dataflow
The floating-point unit of a S/390 CMOS microprocessor is described. It contains a 116 bit fraction dataflow for addition and subtraction and a 64 bit-wide multiplier. Besides the...
Guenter Gerwig, Michael Kroener