166 search results - page 22 / 34 » On testing delay faults in macro-based combinational circuit... |
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
We provide a general formulation for the code-based test compression problem with fixed-length input blocks and propose a solution approach based on Evolutionary Algorithms. In c...
DDECS
2007
IEEE
14 years 2 months ago
2007
IEEE
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
VTS
2000
IEEE
14 years 5 days ago
2000
IEEE
We present a low-cost on-line test methodology for RTL controller-datapath pairs, based on the notion of path invariance. The fundamental observation supporting the proposed metho...
IFIP
2001
Springer
14 years 7 days ago
2001
Springer
: High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single In...
GLVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
The characterization as well as the control of the electromagnetic emission of integrated circuits is an important step in the design process of state of the art integrated circui...