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ISVLSI
2003
IEEE
157views VLSI» more  ISVLSI 2003»
14 years 29 days ago
Joint Minimization of Power and Area in Scan Testing by Scan Cell Reordering
This paper describes a technique for re-ordering of scan cells to minimize power dissipation that is also capable of reducing the area overhead of the circuit compared to a random...
Shalini Ghosh, Sugato Basu, Nur A. Touba
FATES
2004
Springer
14 years 1 months ago
Using Model Checking for Reducing the Cost of Test Generation
This paper presents a method for reducing the cost of test generation. A spanning set for a coverage criterion is a set of entities such that exercising every entity in the spannin...
Hyoung Seok Hong, Hasan Ural
ITC
2000
IEEE
68views Hardware» more  ITC 2000»
14 years 2 days ago
Current ratios: a self-scaling technique for production IDDQ testing
The use of a single pass/fail threshold for IDDQ testing is unworkable as chip background currents increase to the point where they exceed many defect currents. This paper describ...
Peter C. Maxwell, Pete O'Neill, Robert C. Aitken, ...
ICASSP
2010
IEEE
13 years 7 months ago
Voice activity detection using harmonic frequency components in likelihood ratio test
This paper proposes a new statistical model-based likelihood ratio test (LRT) VAD to obtain reliable speech / non-speech decisions. In the proposed method, the likelihood ratio (L...
Lee Ngee Tan, Bengt J. Borgstrom, Abeer Alwan
TIT
2002
125views more  TIT 2002»
13 years 7 months ago
Optimal bi-level quantization of i.i.d. sensor observations for binary hypothesis testing
We consider the problem of binary hypothesis testing using binary decisions from independent and identically distributed (i.i.d). sensors. Identical likelihood-ratio quantizers wit...
Qian Zhang, Pramod K. Varshney, Richard D. Wesel