Sciweavers

2034 search results - page 319 / 407
» On the Comparability of Software Clustering Algorithms
Sort
View
ISSS
1999
IEEE
149views Hardware» more  ISSS 1999»
14 years 8 days ago
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications
Synchronous Dataflow, a subset of dataflow, has proven to be a good match for specifying DSP programs. Because of the limited amount of memory in embedded DSPs, a key problem duri...
Praveen K. Murthy, Shuvra S. Bhattacharyya
FCCM
2009
IEEE
316views VLSI» more  FCCM 2009»
13 years 12 months ago
An FPGA Implementation for Solving Least Square Problem
This paper proposes a high performance least square solver on FPGAs using the Cholesky decomposition method. Our design can be realized by iteratively adopting a single triangular...
Depeng Yang, Gregory D. Peterson, Husheng Li, Junq...
FPL
2004
Springer
143views Hardware» more  FPL 2004»
13 years 11 months ago
Exploring Area/Delay Tradeoffs in an AES FPGA Implementation
Abstract. Field-Programmable Gate Arrays (FPGAs) have lately become a popular target for implementing cryptographic block ciphers, as a well-designed FPGA solution can combine some...
Joseph Zambreno, David Nguyen, Alok N. Choudhary
FPL
2008
Springer
138views Hardware» more  FPL 2008»
13 years 9 months ago
An efficient run-time router for connecting modules in FPGAS
It is often desirable to change the logic and/or the connections within an FPGA design on-the-fly without the benefit of a workstation or vendor CAD software. This paper presents ...
Jorge Surís, Cameron Patterson, Peter Athan...
BILDMED
2008
129views Algorithms» more  BILDMED 2008»
13 years 9 months ago
Evaluating the Performance of Processing Medical Volume Data on Graphics Hardware
With the broad availability and increasing performance of commodity graphics processors (GPU), non-graphical applications have become an active field of research. However, leveragi...
Matthias Raspe, Guido Lorenz, Stefan Müller 0...