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» On the Complexity of Circuit Satisfiability
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DATE
2003
IEEE
124views Hardware» more  DATE 2003»
14 years 2 months ago
A Custom-Cell Identification Method for High-Performance Mixed Standard/Custom-Cell Designs
: Over the years, many design methodologies/tools and layout architectures have been developed for datapath-oriented designs. One commonly used approach for high-speed datapath des...
Jennifer Y.-L. Lo, Wu-An Kuo, Allen C.-H. Wu, Ting...
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 6 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
14 years 6 months ago
Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
Zhuo Feng, Peng Li
SP
2007
IEEE
108views Security Privacy» more  SP 2007»
14 years 3 months ago
Trojan Detection using IC Fingerprinting
Hardware manufacturers are increasingly outsourcing their IC fabrication work overseas due to much lower costs. This poses a significant security risk for ICs used for critical m...
Dakshi Agrawal, Selçuk Baktir, Deniz Karako...
MEMOCODE
2006
IEEE
14 years 3 months ago
Latency-insensitive design and central repetitive scheduling
The theory of latency-insensitive design (LID) was recently invented to cope with the time closure problem in otherwise synchronous circuits and programs. The idea is to allow the...
Julien Boucaron, Robert de Simone, Jean-Vivien Mil...