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» On the Complexity of Circuit Satisfiability
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ISCAS
2007
IEEE
79views Hardware» more  ISCAS 2007»
14 years 3 months ago
Quadrature Mismatch Shaping Techniques for Fully Differential Circuits
— Quadrature Σ∆ ADCs require a feedback path for both the I and the Q part of the complex feedback signal. A complex DAC could give this feedback with near-perfect I/Q balance...
Stijn Reekmans, Pieter Rombouts, Ludo Weyten
CSR
2008
Springer
13 years 10 months ago
Cracks in the Defenses: Scouting Out Approaches on Circuit Lower Bounds
Razborov and Rudich identified an imposing barrier that stands in the way of progress toward the goal of proving superpolynomial lower bounds on circuit size. Their work on "n...
Eric Allender
CORR
2010
Springer
120views Education» more  CORR 2010»
13 years 8 months ago
State machine models of timing and circuit design
This paper illustrates a technique for specifying the detailed timing, logical operation, and compositional circuit design of digital circuits in terms of ordinary state machines w...
Victor Yodaiken
ET
2007
123views more  ET 2007»
13 years 8 months ago
Defect-tolerant Logic with Nanoscale Crossbar Circuits
Crossbar architectures are one approach to molecular electronic circuits for memory and logic applications. However, currently feasible manufacturing technologies introduce numero...
Tad Hogg, Greg Snider
ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
13 years 6 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...