115 search results - page 8 / 23 » On the Design of IEEE Compliant Floating Point Units |
ICCD
1997
IEEE
13 years 12 months ago
1997
IEEE
ARITH
2001
IEEE
13 years 11 months ago
2001
IEEE
Design of the leading zero anticipator ( L a ) or detector (LZD) is pivotal to the normalization of results for addition and fused multiplication-addition in highperjormance float...
ERSA
2006
13 years 9 months ago
2006
Floating-point summation is one of the most important operations in scientific/numerical computing applications and also a basic subroutine (SUM) in BLAS (Basic Linear Algebra Sub...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— This paper presents the design of a combined two’s complement and IEEE 754-compliant floating-point comparator. Unlike previous designs, this comparator incorporates both op...
CDES
2006
13 years 9 months ago
2006
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...