808 search results - page 75 / 162 » On the Estimation of Join Result Sizes |
ASPDAC
2000
ACM
14 years 3 months ago
2000
ACM
Reducing power consumption has become a key goal for systemon-a-chip (SOC) designs. Fast and accurate power estimation is needed early in the design process, since power reduction...
TPDS
2008
13 years 10 months ago
2008
To construct an efficient overlay network, the information of underlay is important. We consider using end-to-end measurement tools such as traceroute to infer the underlay topolog...
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
The recent past has seen a tremendous increase in the size of design circuits that can be implemented in a single FPGA. These large design sizes significantly impact cycle time du...
ESCIENCE
2007
IEEE
14 years 5 months ago
2007
IEEE
Effective scheduling is a key concern for the execution of performance driven Grid applications. In this paper, we propose a Dynamic Critical Path (DCP) based workflow scheduling ...
ICICS
2004
Springer
14 years 4 months ago
2004
Springer
Abstract. The NRL Pump protocol defines a multilevel secure component whose goal is to minimize leaks of information from high level systems to lower level systems, without degrad...