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ASPDAC
2007
ACM
131views Hardware» more  ASPDAC 2007»
14 years 2 months ago
Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign
Deep submicron effects drive the complication in designing chips, as well as in package designs and communications between package and board. As a result, the iterative interface d...
Ren-Jie Lee, Ming-Fang Lai, Hung-Ming Chen
IROS
2007
IEEE
85views Robotics» more  IROS 2007»
14 years 5 months ago
Probabilistic map building considering sensor visibility for mobile robot
— This paper describes a method of probabilistic obstacle map building based on Bayesian estimation. Most active or passive obstacle sensors observe only the most frontal objects...
Kazuma Haraguchi, Nobutaka Shimada, Yoshiaki Shira...
RTSS
2003
IEEE
14 years 3 months ago
Experimental Evaluation of Code Properties for WCET Analysis
This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
Antoine Colin, Stefan M. Petters
RT
2001
Springer
14 years 3 months ago
Path Differentials and Applications
Abstract. Photo-realistic rendering algorithms such as Monte Carlo ray tracing sample individual paths to compute images. Noise and aliasing artefacts are usually reduced by supers...
Frank Suykens, Yves D. Willems
EWSN
2010
Springer
14 years 2 months ago
Mitigating the Effects of RF Interference through RSSI-Based Error Recovery
On a common sensor node platform (Telos) we sample RSSI with high frequency during packet reception. We find that a packet collision (RF interference) often manifests as a measurab...
Jan-Hinrich Hauer, Andreas Willig, Adam Wolisz