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FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
14 years 16 days ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
ENTCS
2006
97views more  ENTCS 2006»
13 years 8 months ago
VyrdMC: Driving Runtime Refinement Checking with Model Checkers
This paper presents VyrdMC, a runtime verification tool we are building for concurrent software components. The correctness criterion checked by VyrdMC is refinement: Each executi...
Tayfun Elmas, Serdar Tasiran
BMCBI
2011
13 years 12 days ago
Efficient alignment of pyrosequencing reads for re-sequencing applications
Background: Over the past few years, new massively parallel DNA sequencing technologies have emerged. These platforms generate massive amounts of data per run, greatly reducing th...
Francisco Fernandes, Paulo G. S. da Fonseca, Lu&ia...
HPCA
2003
IEEE
14 years 9 months ago
Deterministic Clock Gating for Microprocessor Power Reduction
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykuma...
IPPS
2005
IEEE
14 years 2 months ago
Dynamic Reconfiguration of Mechatronic Real-Time Systems Based on Configuration State Machines
Data flow and FSMs are used intensively to specify real-time systems in the field of mechatronics. Their implementation in FPGAs is discussed against the background of dynamic rec...
Steffen Toscher, Roland Kasper, Thomas Reinemann