Suitability of the next generation of high-performance computing systems for petascale simulations will depend on a balance between factors such as processor performance, memory p...
Subhash Saini, Dennis C. Jespersen, Dale Talcott, ...
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
K. Van Renterghem, Dieter Verhulst, S. Verschuere,...
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
Large-scale computing environments, such as TeraGrid, Distributed ASCI Supercomputer (DAS), and Grid’5000, have been using resource co-allocation to execute applications on mult...