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» On the Fault Testing for Reversible Circuits
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ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
14 years 4 months ago
Power Droop Testing
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd...
ITC
1989
IEEE
82views Hardware» more  ITC 1989»
13 years 11 months ago
CMOS IC Stuck-Open Fault Electrical Effects and Design Considerations
- The electrical effects of CMOS IC physical defects that caused stuck-openfaults are evaluated, including their voltage levels, quiescent power supply current (IDDQ), transient re...
Jerry M. Soden, R. Keith Treece, Michael R. Taylor...
IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
14 years 1 months ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand
DAC
2000
ACM
14 years 8 months ago
Self-test methodology for at-speed test of crosstalk in chip interconnects
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
Xiaoliang Bai, Sujit Dey, Janusz Rajski
ITC
1995
IEEE
104views Hardware» more  ITC 1995»
13 years 11 months ago
Synthesis of Mapping Logic for Generating Transformed Pseudo-Random Patterns for BIST
During built-in self-test (BIST), the set of patterns generated by a pseudo-random pattern generator may not provide a sufficiently high fault coverage. This paper presents a new ...
Nur A. Touba, Edward J. McCluskey