281 search results - page 48 / 57 » On the Hardware Implementation Cost of Crypto-Processors Arc... |
DSN
2007
IEEE
14 years 2 months ago
2007
IEEE
Programmable logic arrays (PLA), which can implement arbitrary logic functions in a two-level logic form, are promising as platforms for nanoelectronic logic due to their highly r...
MSS
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper examines the application of Tornado Codes, a class of low density parity check (LDPC) erasure codes, to archival storage systems based on massive arrays of idle disks (...
CDVE
2007
Springer
14 years 1 months ago
2007
Springer
Analysis of existing ICT-based solutions for the education of long-term ill children reveal several weaknesses with respect to social and cooperative involvement, cost of developme...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
—A novel clock and data recovery architecture with adaptive loop gain is proposed for spread spectrum SerDes applications such as the Serial AT Attachment. The proposed design co...
DFT
2003
IEEE
14 years 28 days ago
2003
IEEE
This paper discusses a hybrid optoelectronic scheme for a new interconnection network, "Tori connected mESHes (TESH)". The major features of TESH are the following: it i...