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CONEXT
2007
ACM
13 years 11 months ago
On the cost of caching locator/ID mappings
Very recent activities in the IETF and in the Routing Research Group (RRG) of the IRTG focus on defining a new Internet architecture, in order to solve scalability issues related ...
Luigi Iannone, Olivier Bonaventure
ITC
1998
IEEE
61views Hardware» more  ITC 1998»
13 years 11 months ago
Test session oriented built-in self-testable data path synthesis
Existing high-level BIST synthesis methods focus on one objective, minimizing either area overhead or test time. Hence, those methods do not render exploration of large design spa...
Han Bin Kim, Takeshi Takahashi, Dong Sam Ha
DAC
2007
ACM
14 years 8 months ago
A System For Coarse Grained Memory Protection In Tiny Embedded Processors
Many embedded systems contain resource constrained microcontrollers where applications, operating system components and device drivers reside within a single address space with no...
Ram Kumar, Akhilesh Singhania, Andrew Castner, Edd...
IWMM
2010
Springer
125views Hardware» more  IWMM 2010»
13 years 9 months ago
Efficient memory shadowing for 64-bit architectures
Shadow memory is used by dynamic program analysis tools to store metadata for tracking properties of application memory. The efficiency of mapping between application memory and s...
Qin Zhao, Derek Bruening, Saman P. Amarasinghe
ISMIS
2003
Springer
14 years 22 days ago
Classifying Document Titles Based on Information Inference
We propose an intelligent document title classification agent based on a theory of information inference. The information is represented as vectorial spaces computed by a cognitive...
Dawei Song, Peter Bruza, Zi Huang, Raymond Y. K. L...