183 search results - page 8 / 37 » On the Impact of Caching for High Performance Packet Classif... |
INFOCOM
2002
IEEE
14 years 1 months ago
2002
IEEE
– Efficient data retrieval in a peer-to-peer system like Freenet is a challenging problem. In this paper we study the impact of cache replacement policy on the performance of Fre...
TC
1998
13 years 8 months ago
1998
—High instruction cache hit rates are key to high performance. One known technique to improve the hit rate of caches is to minimize cache interference by improving the layout of ...
GLVLSI
2005
IEEE
14 years 2 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
CLUSTER
2008
IEEE
14 years 3 months ago
2008
IEEE
—Remote atomic memory operations are critical for achieving high-performance synchronization in tightly-coupled systems. Previous approaches to implementing atomic memory operati...
PAM
2004
Springer
14 years 1 months ago
2004
Springer
We have analyzed the measurements of the end-to-end packet reordering by tracing UDP packets between 12 testboxes of RIPE NCC. We showed that reordering quite often happens in Inte...