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» On the Implementation of a Fast Prime Generation Algorithm
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FPL
2004
Springer
205views Hardware» more  FPL 2004»
14 years 27 days ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...
ARITH
2009
IEEE
14 years 2 months ago
A Dual-Purpose Real/Complex Logarithmic Number System ALU
—The real Logarithmic Number System (LNS) allows fast and inexpensive multiplication and division but more expensive addition and subtraction as precision increases. Recent advan...
Mark G. Arnold, Sylvain Collange
ICIP
2003
IEEE
14 years 9 months ago
Inverse halftoning by decision tree learning
Inverse halftoning is the process to retrieve a (gray) continuous-tone image from a halftone. Recently, machinelearning-based inverse halftoning techniques have been proposed. Dec...
Hae Yong Kim, Ricardo L. de Queiroz
ECOOP
1997
Springer
13 years 11 months ago
Near Optimal Hierarchical Encoding of Types
A type inclusion test is a procedure to decide whether two types are related by a given subtyping relationship. An efficient implementation of the type inclusion test plays an impo...
Andreas Krall, Jan Vitek, R. Nigel Horspool
ASPDAC
2005
ACM
120views Hardware» more  ASPDAC 2005»
13 years 9 months ago
STACCATO: disjoint support decompositions from BDDs through symbolic kernels
Abstract— A disjoint support decomposition (DSD) is a representation of a Boolean function F obtained by composing two or more simpler component functions such that the component...
Stephen Plaza, Valeria Bertacco