340 search results - page 44 / 68 » On the Interplay of Parallelization, Program Performance, an... |
APCSAC
2003
IEEE
14 years 1 months ago
2003
IEEE
This paper introduces a method which can be used to map applications written in a high level source language program, like C, to a coarse grain reconfigurable architecture, MONTIU...
IEEEPACT
2006
IEEE
14 years 2 months ago
2006
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
HIPC
2007
Springer
14 years 2 months ago
2007
Springer
- With the increased complexity of platforms coupled with data centers’ servers sprawl, power consumption is reaching unsustainable limits. Memory is an important target for plat...
IPPS
2008
IEEE
14 years 2 months ago
2008
IEEE
SIMD (single instruction multiple data)-type processors have been found very efficient in image processing applications, because their repetitive structure is able to exploit the...
FCCM
2011
IEEE
13 years 6 days ago
2011
IEEE
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...