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» On the Interplay of Parallelization, Program Performance, an...
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2003
ACM
14 years 18 days ago
Identifying and Exploiting Spatial Regularity in Data Memory References
The growing processor/memory performance gap causes the performance of many codes to be limited by memory accesses. If known to exist in an application, strided memory accesses fo...
Tushar Mohan, Bronis R. de Supinski, Sally A. McKe...
ICDE
2007
IEEE
182views Database» more  ICDE 2007»
14 years 8 months ago
DIKNN: An Itinerary-based KNN Query Processing Algorithm for Mobile Sensor Networks
Current approaches to K Nearest Neighbor (KNN) search in mobile sensor networks require certain kind of indexing support. This index could be either a centralized spatial index or...
Shan-Hung Wu, Kun-Ta Chuang, Chung-Min Chen, Ming-...
HIPEAC
2009
Springer
14 years 2 months ago
MLP-Aware Runahead Threads in a Simultaneous Multithreading Processor
Abstract. Threads experiencing long-latency loads on a simultaneous multithreading (SMT) processor may clog shared processor resources without making forward progress, thereby star...
Kenzo Van Craeynest, Stijn Eyerman, Lieven Eeckhou...
IPPS
2006
IEEE
14 years 1 months ago
Making a case for a Green500 list
For decades now, the notion of “performance” has been synonymous with “speed” (as measured in FLOPS, short for floating-point operations per second). Unfortunately, this ...
S. Sharma, Chung-Hsing Hsu, Wu-chun Feng
3DIC
2009
IEEE
263views Hardware» more  3DIC 2009»
13 years 10 months ago
3D optical networks-on-chip (NoC) for multiprocessor systems-on-chip (MPSoC)
Abstract— Networks-on-chip (NoC) is emerging as a key onchip communication architecture for multiprocessor systemson-chip (MPSoC). In traditional electronic NoCs, high bandwidth ...
Yaoyao Ye, Lian Duan, Jiang Xu, Jin Ouyang, Mo Kwa...