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ISCA
1995
IEEE
93views Hardware» more  ISCA 1995»
13 years 11 months ago
Optimizing Memory System Performance for Communication in Parallel Computers
Communicationin aparallel systemfrequently involvesmoving data from the memory of one node to the memory of another; this is the standard communication model employedin message pa...
Thomas Stricker, Thomas R. Gross
CASES
2004
ACM
13 years 11 months ago
Automatic data partitioning for the agere payload plus network processor
With the ever-increasing pervasiveness of the Internet and its stringent performance requirements, network system designers have begun utilizing specialized chips to increase the ...
Steve Carr, Philip H. Sweany
ICIP
1997
IEEE
13 years 11 months ago
Object Based Video with Progressive Foreground
A novel algorithm is described for coding objects in video compression systems which gives complete control over the bit allocation to the video objects. The method is evaluated b...
Donald M. Monro, Huijuan Li, J. A. Nicholls
IEEEPACT
2007
IEEE
14 years 1 months ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
ISSTA
2010
ACM
13 years 11 months ago
Proving memory safety of floating-point computations by combining static and dynamic program analysis
Whitebox fuzzing is a novel form of security testing based on dynamic symbolic execution and constraint solving. Over the last couple of years, whitebox fuzzers have found many ne...
Patrice Godefroid, Johannes Kinder