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ISPASS
2005
IEEE
14 years 1 months ago
Accelerating Multiprocessor Simulation with a Memory Timestamp Record
We introduce a fast and accurate technique for initializing the directory and cache state of a multiprocessor system based on a novel software structure called the memory timestam...
Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste A...
SBACPAD
2007
IEEE
143views Hardware» more  SBACPAD 2007»
14 years 2 months ago
A Code Compression Method to Cope with Security Hardware Overheads
Code Compression has been used to alleviate the memory requirements as well as to improve performance and/or minimize energy consumption. On the other hand, implementing security ...
Eduardo Wanderley Netto, Romain Vaslin, Guy Gognia...
JUCS
2008
180views more  JUCS 2008»
13 years 8 months ago
The APS Framework For Incremental Learning of Software Agents
Abstract: Adaptive behavior and learning are required of software agents in many application domains. At the same time agents are often supposed to be resource-bounded systems, whi...
Damian Dudek
ERSA
2004
134views Hardware» more  ERSA 2004»
13 years 9 months ago
A High Performance Application Representation for Reconfigurable Systems
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
Wenrui Gong, Gang Wang, Ryan Kastner
DCOSS
2008
Springer
13 years 9 months ago
SAKE: Software Attestation for Key Establishment in Sensor Networks
Abstract. This paper presents a protocol called SAKE (Software Attestation for Key Establishment), for establishing a shared key between any two neighboring nodes of a sensor netwo...
Arvind Seshadri, Mark Luk, Adrian Perrig