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ANCS
2009
ACM
13 years 5 months ago
Design and performance analysis of a DRAM-based statistics counter array architecture
The problem of maintaining efficiently a large number (say millions) of statistics counters that need to be updated at very high speeds (e.g. 40 Gb/s) has received considerable re...
Haiquan (Chuck) Zhao, Hao Wang, Bill Lin, Jun (Jim...
MOBICOM
2004
ACM
14 years 1 months ago
Architecture and techniques for diagnosing faults in IEEE 802.11 infrastructure networks
The wide-scale deployment of IEEE 802.11 wireless networks has generated significant challenges for Information Technology (IT) departments in corporations. Users frequently comp...
Atul Adya, Paramvir Bahl, Ranveer Chandra, Lili Qi...
ICCAD
1999
IEEE
115views Hardware» more  ICCAD 1999»
14 years 1 days ago
Fast performance analysis of bus-based system-on-chip communication architectures
This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. ...
Kanishka Lahiri, Anand Raghunathan, Sujit Dey
CODES
2006
IEEE
14 years 1 months ago
TLM/network design space exploration for networked embedded systems
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...
Nicola Bombieri, Franco Fummi, Davide Quaglia
IWNAS
2008
IEEE
14 years 2 months ago
Accurate Performance Modeling and Guidance to the Adoption of an Inconsistency Detection Framework
With the increased popularity of replica-based services in distributed systems such as the Grid, consistency control among replicas becomes more and more important. To this end, I...
Yijun Lu, Xueming Li, Hong Jiang