An ATPG technique is proposed that reduces heat dissipation during testing of sequential circuits that have full-scan. The objective is to permit safe and inexpensive testing of l...
Current software suites suffer from problems due to poor integration of their individual tools. They require the designer to think of all possible integrating behaviours and leave...
Anind K. Dey, Gregory D. Abowd, Mike Pinkerton, An...
This paper examines the energy delay implications of partial product reduction methods employed in parallel multiplier implementations. Radix 4 Modified Booth Algorithm (MBA) is c...
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Kha...
Many years of CMOS technology scaling have resulted in increased power densities and higher core temperatures. Power and temperature concerns are now considered to be a primary cha...
Daniel C. Vanderster, Amirali Baniasadi, Nikitas J...
At UCLA's Plasma Physics Group, we have been successful in building and using a numerically-intensive parallel computing cluster using Power Macintosh hardware and the Macint...