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» On the Salsa20 Core Function
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GLVLSI
2007
IEEE
167views VLSI» more  GLVLSI 2007»
14 years 3 months ago
A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS
A PAL-based logic block is the core of great majority of contemporary CPLD devices. The purpose of the paper is to present a new approach to multi-level synthesis for PAL-based CP...
Dariusz Kania
FMICS
2010
Springer
13 years 10 months ago
SMT-Based Formal Verification of a TTEthernet Synchronization Function
Abstract. TTEthernet is a communication infrastructure for mixedcriticality systems that integrates dataflow from applications with different criticality levels on a single network...
Wilfried Steiner, Bruno Dutertre
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
14 years 22 days ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
GLVLSI
2010
IEEE
156views VLSI» more  GLVLSI 2010»
14 years 2 months ago
A multi-level approach to reduce the impact of NBTI on processor functional units
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Taniya Siddiqua, Sudhanva Gurumurthi
COMCOM
2006
112views more  COMCOM 2006»
13 years 9 months ago
Performance modelling and evaluation of IEEE 802.11 distributed coordination function in multihop wireless networks
Initially designed for WLAN's, IEEE 802.11 medium access control (MAC) has also been widely used in the research of multihop wireless networks. The core MAC technique of IEEE ...
Jun He, Hung Keng Pung