858 search results - page 78 / 172 » On the Salsa20 Core Function |
IEEEPACT
2009
IEEE
14 years 3 months ago
2009
IEEE
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
IPPS
2009
IEEE
14 years 3 months ago
2009
IEEE
In this paper, we present a methodology for profiling parallel applications executing on the IBM PowerXCell 8i (commonly referred to as the “Cell” processor). Specifically, we...
PDCAT
2009
Springer
14 years 3 months ago
2009
Springer
—We have proposed an auto-memoization processor. This processor automatically and dynamically memoizes both functions and loop iterations, and skips their execution by reusing th...
HAPTICS
2007
IEEE
14 years 3 months ago
2007
IEEE
We present a fast proximity query algorithm for haptic display of complex deformable models using a layered representation. Assuming that each solid model can be represented as a ...
FPL
2007
Springer
14 years 3 months ago
2007
Springer
We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. RAMP Blue is the first of these prototypes and...