9871 search results - page 75 / 1975 » On the Structure of Low Sets |
WMPI
2004
ACM
14 years 2 months ago
2004
ACM
The size and speed of first-level caches and SRAMs of embedded processors continue to increase in response to demands for higher performance. In power-sensitive devices like PDAs a...
ATS
1998
IEEE
14 years 1 months ago
1998
IEEE
In mixed-mode BIST, deterministic test patterns are generated with on-chip hardware to detect the random-pattern-resistant (r.p.r.) faults that are missed by the pseudo-random pat...
DFT
2005
IEEE
13 years 11 months ago
2005
IEEE
A built-in self-test (BIST) scheme is presented which both reduces overhead for detecting random-pattern-resistant (r.p.r.) faults as well as reduces power consumption during test...
IPCO
2007
13 years 10 months ago
2007
Abstract. We consider the single machine scheduling problem to minimize the average weighted completion time under precedence constrains. Improving on the various 2-approximation a...
CSREAESA
2003
13 years 10 months ago
2003
This paper presents a comparison of power-aware video decoding techniques that utilize Dynamic Voltage Scaling (DVS) capability. Three techniques were simulated and compared in te...