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» On the Utility of Threads for Data Parallel Programming
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ICS
1993
Tsinghua U.
14 years 22 days ago
The EM-4 Under Implicit Parallelism
: The EM-4 is a supercomputer that offers very fast inter processor communication and support for multi threading. In this paper we demonstrate that the EM-4, Together with an auto...
Lubomir Bic, Mayez A. Al-Mouhamed
OOPSLA
2009
Springer
14 years 3 months ago
The design of a task parallel library
The Task Parallel Library (TPL) is a library for .NET that makes it easy to take advantage of potential parallelism in a program. The library relies heavily on generics and delega...
Daan Leijen, Wolfram Schulte, Sebastian Burckhardt
CGO
2008
IEEE
14 years 3 months ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
14 years 3 months ago
Copy or Discard execution model for speculative parallelization on multicores
The advent of multicores presents a promising opportunity for speeding up sequential programs via profile-based speculative parallelization of these programs. In this paper we pr...
Chen Tian, Min Feng, Vijay Nagarajan, Rajiv Gupta
DATE
2009
IEEE
133views Hardware» more  DATE 2009»
14 years 3 months ago
Pipelined data parallel task mapping/scheduling technique for MPSoC
—In this paper, we propose a multi-task mapping/scheduling technique for heterogeneous and scalable MPSoC. To utilize the large number of cores embedded in MPSoC, the proposed te...
Hoeseok Yang, Soonhoi Ha