289 search results - page 46 / 58 » On the Utility of Threads for Data Parallel Programming |
ISCA
2008
IEEE
14 years 3 months ago
2008
IEEE
A high-concurrency transactional memory (TM) implementation needs to track concurrent accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM (FLE...
OOPSLA
2009
Springer
14 years 3 months ago
2009
Springer
Software has spent the bounty of Moore’s law by solving harder problems and exploiting abstractions, such as highlevel languages, virtual machine technology, binary rewritdynami...
BMCBI
2010
13 years 8 months ago
2010
Background: Massively parallel sequencing readouts of epigenomic assays are enabling integrative genome-wide analyses of genomic and epigenomic variation. Pash 3.0 performs sequen...
IEEEPACT
2009
IEEE
13 years 6 months ago
2009
IEEE
As the gap between processor and memory continues to grow, memory performance becomes a key performance bottleneck for many applications. Compilers therefore increasingly seek to m...
HPCA
2011
IEEE
13 years 4 days ago
2011
IEEE
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...