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» On the architecture of software component systems
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ISPASS
2009
IEEE
14 years 3 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
IPPS
2009
IEEE
14 years 3 months ago
Input-independent, scalable and fast string matching on the Cray XMT
String searching is at the core of many security and network applications like search engines, intrusion detection systems, virus scanners and spam filters. The growing size of o...
Oreste Villa, Daniel G. Chavarría-Miranda, ...
LCTRTS
2007
Springer
14 years 3 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
CODES
2005
IEEE
14 years 2 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
CIKM
2001
Springer
14 years 1 months ago
PowerDB-IR - Information Retrieval on Top of a Database Cluster
Our current concern is a scalable infrastructure for information retrieval (IR) with up-to-date retrieval results in the presence of frequent, continuous updates. Timely processin...
Torsten Grabs, Klemens Böhm, Hans-Jörg S...
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